Include:Architecture support matrix: Difference between revisions

From Alpine Linux
(added information from Requirements page)
m (fixe typo)
 
(One intermediate revision by the same user not shown)
Line 1: Line 1:
<!-- Do not add heading(s) or content unrelated to this topic as the table below is transcluded in multiple pages-->
{|class="wikitable" align="center" style="width:100%; border:1px #0771a6 solid; background:#f9f9f9; text-align:left; border-collapse:collapse;"
{|class="wikitable" align="center" style="width:100%; border:1px #0771a6 solid; background:#f9f9f9; text-align:left; border-collapse:collapse;"
|- style="background:#333333; color:#ffffff; font-size: 1.2em; text-align:center;"
|- style="background:#333333; color:#ffffff; font-size: 1.2em; text-align:center;"

Latest revision as of 04:36, 21 December 2024

Alpine Linux Hardware Support Matrix
Architecture Port Description Since
x86 x86 32 bit i686 compatible (or later) CPUs with at least CMOV and SSE2 All
x86_64 AMD64 compatible 64-bit x86 instruction set All
ARM armhf 32 bit ARM with hard-float ABI - for ARMv6 devices- Raspberry Pi 1, Zero, ZeroW, cm1 (defconfig bcmrpi) v3.0
armv7 32 bit ARM - for ARMv7 devices - Raspberry Pi 2, 3, 3+, Zero2W, cm3, cm3+ (defconfig bcm2709) v3.9
aarch64 64 bit ARM - for ARMv8+ devices - Raspberry Pi 3, 3+, 4, 400, Zero2W, cm3, cm3+, cm4, 5 (defconfig bcm2711) v3.5
PowerPC ppc64le 64 bit PowerPC (little-endian) mostly for POWER8 and POWER9 v3.6
IBM System Z s390x IBM Z mainframes, especially IBM Z and IBM LinuxONE (z196 minimum) v3.6
RISC V riscv64 64 bit RISC V v3.20
LoongArch loongarch64 64 bit LoongArch v3.21